The invention relates generally to the field of digital computer systems, and more particularly to systems for enabling one or more resources, such as disk storage devices, to be selectively shared among a plurality of host computers.
A digital data processing system normally comprises a number of devices which are interconnected to enable information to be transferred thereamong for processing, storage, display, printing and the like. A number of interconnection arrangements have been used in digital data processing systems. In one particular arrangement, in which information is transferred using the well-known Fibre Channel protocol, the devices are connected in a ring topology, in which device DEV(1) transfers information to device DEV(2), and so forth. The last device DEV(L) in the ring transfers information to the first device DEV(1), thereby completing the ring. A ring interconnection using the Fibre Channel protocol has a number of advantages, most notably the fact that information can be transferred very rapidly, in particular up to the gigabit-per-second range.
There are several disadvantages, however, to the use of a ring interconnection topology. One disadvantage is that adding devices to a ring interconnection can be difficult and lead to failures. In addition, if a device fails, information transferred through the interconnection can be stopped or corrupted, depending on the cause of the failure, and locating the particular failing device and isolating the device can be difficult.
The invention provides a new and improved system and method for facilitating the sharing of resources such as storage subsystems among a plurality of host computers in a digital data processing system.
In brief summary, a digital data processing system comprises at least one subsystem comprising a plurality of resources, such as a storage subsystem comprising a plurality of drive modules, and a host processor. The host processor is connected to the drive modules through an interconnection which has a topology in the form of a loop. The interconnection has at least one configuration switch that is selectively configurable to a pass-through mode, in which the topology comprises the entire loop, or a bypass mode, in which the topology comprises a portion of the loop including the host processor and, possibly, at least one of the drive modules in the storage subsystem. The host processor can selectively condition the configuration switch into the pass-through mode or said bypass mode to connect more or fewer drive modules into the loop.
In a further aspect, each of the disk modules further includes a disk module and a port by-pass switch, the port by-pass switch also being selectively configurable to a pass-through mode, in which the topology of the interconnection includes the disk module, and a bypass mode, in which the topology of the interconnection bypasses the disk module. The host processor can selectively condition the port bypass switches of the disk modules to connect more or fewer disk modules into the loop. The configuration switch and the port by-pass switches are directly controlled by a subsystem controller, which receives commands for controlling the switches from the host processor over a separate command interconnection.